Semiconductor device fabrication processes typically include the introduction of dopants into a semiconductor substrate to form device junctions in the semiconductor substrate. Because of its superior controllability and processing throughput, ion implantation is one of the most widely used processes for introducing dopants into the semiconductor substrate. An ion implantation process typically includes depositing a photoresist on the semiconductor substrate, exposing the photoresist using a mask, developing the photoresist to produce the desired lithographic pattern, and implanting ions into the semiconductor substrate through the photoresist pattern.
A semiconductor device fabrication process usually includes several doping processes. The photoresist masks in different ion implantation processes should align with each other. In state of art semiconductor devices, the tolerance for the misalignment between different photoresist masks is very small, typically less than 0.1 micrometer. Accurately aligning photoresist masks with each other is complicated and time consuming. Further, the ion implantation processes are unsuitable for forming shallow junctions, e.g., junctions having depths less than 100 nanometers, and high dopant density which are often essential for submicron semiconductor devices to achieve high performances in terms of contact resistance, sheet resistance, and junction leakage current.
Accordingly, it would be advantageous to have a doping process capable of forming multiple doped regions accurately aligned with each other in a semiconductor substrate. It is desirable if the doping process can be performed without the complicated inefficient steps of depositing, developing, and stripping photoresist. It is also desirable for the doping process to be capable of forming shallow junctions with high dopant densities in the semiconductor substrate. It would be of further advantage for the doping process to be compatible with the fabrication of high performance submicron semiconductor devices.